Cinelerra: hvirtual/quicktime/mmx.h Source File

00001 /*      mmx.h
00002 
00003         MultiMedia eXtensions GCC interface library for IA32.
00004 
00005         To use this library, simply include this header file
00006         and compile with GCC.  You MUST have inlining enabled
00007         in order for mmx_ok() to work; this can be done by
00008         simply using -O on the GCC command line.
00009 
00010         Compiling with -DMMX_TRACE will cause detailed trace
00011         output to be sent to stderr for each mmx operation.
00012         This adds lots of code, and obviously slows execution to
00013         a crawl, but can be very useful for debugging.
00014 
00015         THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY
00016         EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT
00017         LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY
00018         AND FITNESS FOR ANY PARTICULAR PURPOSE.
00019 
00020         1997-98 by H. Dietz and R. Fisher
00021 
00022  History:
00023         97-98*  R.Fisher        Early versions
00024         980501  R.Fisher        Original Release
00025         980611* H.Dietz         Rewrite, correctly implementing inlines, and
00026                 R.Fisher         including direct register accesses.
00027         980616  R.Fisher        Release of 980611 as 980616.
00028         980714  R.Fisher        Minor corrections to Makefile, etc.
00029         980715  R.Fisher        mmx_ok() now prevents optimizer from using
00030                                  clobbered values.
00031                                 mmx_ok() now checks if cpuid instruction is
00032                                  available before trying to use it.
00033         980726* R.Fisher        mm_support() searches for AMD 3DNow, Cyrix
00034                                  Extended MMX, and standard MMX.  It returns a
00035                                  value which is positive if any of these are
00036                                  supported, and can be masked with constants to
00037                                  see which.  mmx_ok() is now a call to this
00038         980726* R.Fisher        Added i2r support for shift functions
00039         980919  R.Fisher        Fixed AMD extended feature recognition bug.
00040         980921  R.Fisher        Added definition/check for _MMX_H.
00041                                 Added "float s[2]" to mmx_t for use with
00042                                   3DNow and EMMX.  So same mmx_t can be used.
00043         981013  R.Fisher        Fixed cpuid function 1 bug (looked at wrong reg)
00044                                 Fixed psllq_i2r error in mmxtest.c
00045 
00046         * Unreleased (internal or interim) versions
00047 
00048  Notes:
00049         It appears that the latest gas has the pand problem fixed, therefore
00050           I'll undefine BROKEN_PAND by default.
00051         String compares may be quicker than the multiple test/jumps in vendor
00052           test sequence in mmx_ok(), but I'm not concerned with that right now.
00053 
00054  Acknowledgments:
00055         Jussi Laako for pointing out the errors ultimately found to be
00056           connected to the failure to notify the optimizer of clobbered values.
00057         Roger Hardiman for reminding us that CPUID isn't everywhere, and that
00058           someone may actually try to use this on a machine without CPUID.
00059           Also for suggesting code for checking this.
00060         Robert Dale for pointing out the AMD recognition bug.
00061         Jimmy Mayfield and Carl Witty for pointing out the Intel recognition
00062           bug.
00063         Carl Witty for pointing out the psllq_i2r test bug.
00064 */
00065 
00066 #ifndef _MMX_H
00067 #define _MMX_H
00068 
00069 /*#define MMX_TRACE */
00070 
00071 /*      Warning:  at this writing, the version of GAS packaged
00072         with most Linux distributions does not handle the
00073         parallel AND operation mnemonic correctly.  If the
00074         symbol BROKEN_PAND is defined, a slower alternative
00075         coding will be used.  If execution of mmxtest results
00076         in an illegal instruction fault, define this symbol.
00077 */
00078 #undef  BROKEN_PAND
00079 
00080 
00081 /*      The type of an value that fits in an MMX register
00082         (note that long long constant values MUST be suffixed
00083          by LL and unsigned long long values by ULL, lest
00084          they be truncated by the compiler)
00085 */
00086 typedef union {
00087         long long               q;      /* Quadword (64-bit) value */
00088         unsigned long long      uq;     /* Unsigned Quadword */
00089         int                     d[2];   /* 2 Doubleword (32-bit) values */
00090         unsigned int            ud[2];  /* 2 Unsigned Doubleword */
00091         short                   w[4];   /* 4 Word (16-bit) values */
00092         unsigned short          uw[4];  /* 4 Unsigned Word */
00093         char                    b[8];   /* 8 Byte (8-bit) values */
00094         unsigned char           ub[8];  /* 8 Unsigned Byte */
00095         float                   s[2];   /* Single-precision (32-bit) value */
00096 } mmx_t;
00097 
00098 
00099 
00100 /*      Function to test if multimedia instructions are supported...
00101 */
00102 inline extern int
00103 mm_support(void)
00104 {
00105         /* Returns 1 if MMX instructions are supported,
00106            3 if Cyrix MMX and Extended MMX instructions are supported
00107            5 if AMD MMX and 3DNow! instructions are supported
00108            0 if hardware does not support any of these
00109         */
00110         register int rval = 0;
00111 
00112         __asm__ __volatile__ (
00113                 /* See if CPUID instruction is supported ... */
00114                 /* ... Get copies of EFLAGS into eax and ecx */
00115                 "pushf\n\t"
00116                 "popl %%eax\n\t"
00117                 "movl %%eax, %%ecx\n\t"
00118 
00119                 /* ... Toggle the ID bit in one copy and store */
00120                 /*     to the EFLAGS reg */
00121                 "xorl $0x200000, %%eax\n\t"
00122                 "push %%eax\n\t"
00123                 "popf\n\t"
00124 
00125                 /* ... Get the (hopefully modified) EFLAGS */
00126                 "pushf\n\t"
00127                 "popl %%eax\n\t"
00128 
00129                 /* ... Compare and test result */
00130                 "xorl %%eax, %%ecx\n\t"
00131                 "testl $0x200000, %%ecx\n\t"
00132                 "jz NotSupported1\n\t"          /* Nothing supported */
00133 
00134 
00135                 /* Get standard CPUID information, and
00136                        go to a specific vendor section */
00137                 "movl $0, %%eax\n\t"
00138                 "cpuid\n\t"
00139 
00140                 /* Check for Intel */
00141                 "cmpl $0x756e6547, %%ebx\n\t"
00142                 "jne TryAMD\n\t"
00143                 "cmpl $0x49656e69, %%edx\n\t"
00144                 "jne TryAMD\n\t"
00145                 "cmpl $0x6c65746e, %%ecx\n"
00146                 "jne TryAMD\n\t"
00147                 "jmp Intel\n\t"
00148 
00149                 /* Check for AMD */
00150                 "\nTryAMD:\n\t"
00151                 "cmpl $0x68747541, %%ebx\n\t"
00152                 "jne TryCyrix\n\t"
00153                 "cmpl $0x69746e65, %%edx\n\t"
00154                 "jne TryCyrix\n\t"
00155                 "cmpl $0x444d4163, %%ecx\n"
00156                 "jne TryCyrix\n\t"
00157                 "jmp AMD\n\t"
00158 
00159                 /* Check for Cyrix */
00160                 "\nTryCyrix:\n\t"
00161                 "cmpl $0x69727943, %%ebx\n\t"
00162                 "jne NotSupported2\n\t"
00163                 "cmpl $0x736e4978, %%edx\n\t"
00164                 "jne NotSupported3\n\t"
00165                 "cmpl $0x64616574, %%ecx\n\t"
00166                 "jne NotSupported4\n\t"
00167                 /* Drop through to Cyrix... */
00168 
00169 
00170                 /* Cyrix Section */
00171                 /* See if extended CPUID is supported */
00172                 "movl $0x80000000, %%eax\n\t"
00173                 "cpuid\n\t"
00174                 "cmpl $0x80000000, %%eax\n\t"
00175                 "jl MMXtest\n\t"        /* Try standard CPUID instead */
00176 
00177                 /* Extended CPUID supported, so get extended features */
00178                 "movl $0x80000001, %%eax\n\t"
00179                 "cpuid\n\t"
00180                 "testl $0x00800000, %%eax\n\t"  /* Test for MMX */
00181                 "jz NotSupported5\n\t"          /* MMX not supported */
00182                 "testl $0x01000000, %%eax\n\t"  /* Test for Ext'd MMX */
00183                 "jnz EMMXSupported\n\t"
00184                 "movl $1, %0:\n\n\t"            /* MMX Supported */
00185                 "jmp Return\n\n"
00186                 "EMMXSupported:\n\t"
00187                 "movl $3, %0:\n\n\t"            /* EMMX and MMX Supported */
00188                 "jmp Return\n\t"
00189 
00190 
00191                 /* AMD Section */
00192                 "AMD:\n\t"
00193 
00194                 /* See if extended CPUID is supported */
00195                 "movl $0x80000000, %%eax\n\t"
00196                 "cpuid\n\t"
00197                 "cmpl $0x80000000, %%eax\n\t"
00198                 "jl MMXtest\n\t"        /* Try standard CPUID instead */
00199 
00200                 /* Extended CPUID supported, so get extended features */
00201                 "movl $0x80000001, %%eax\n\t"
00202                 "cpuid\n\t"
00203                 "testl $0x00800000, %%edx\n\t"  /* Test for MMX */
00204                 "jz NotSupported6\n\t"          /* MMX not supported */
00205                 "testl $0x80000000, %%edx\n\t"  /* Test for 3DNow! */
00206                 "jnz ThreeDNowSupported\n\t"
00207                 "movl $1, %0:\n\n\t"            /* MMX Supported */
00208                 "jmp Return\n\n"
00209                 "ThreeDNowSupported:\n\t"
00210                 "movl $5, %0:\n\n\t"            /* 3DNow! and MMX Supported */
00211                 "jmp Return\n\t"
00212 
00213 
00214                 /* Intel Section */
00215                 "Intel:\n\t"
00216 
00217                 /* Check for MMX */
00218                 "MMXtest:\n\t"
00219                 "movl $1, %%eax\n\t"
00220                 "cpuid\n\t"
00221                 "testl $0x00800000, %%edx\n\t"  /* Test for MMX */
00222                 "jz NotSupported7\n\t"          /* MMX Not supported */
00223                 "movl $1, %0:\n\n\t"            /* MMX Supported */
00224                 "jmp Return\n\t"
00225 
00226                 /* Nothing supported */
00227                 "\nNotSupported1:\n\t"
00228                 "#movl $101, %0:\n\n\t"
00229                 "\nNotSupported2:\n\t"
00230                 "#movl $102, %0:\n\n\t"
00231                 "\nNotSupported3:\n\t"
00232                 "#movl $103, %0:\n\n\t"
00233                 "\nNotSupported4:\n\t"
00234                 "#movl $104, %0:\n\n\t"
00235                 "\nNotSupported5:\n\t"
00236                 "#movl $105, %0:\n\n\t"
00237                 "\nNotSupported6:\n\t"
00238                 "#movl $106, %0:\n\n\t"
00239                 "\nNotSupported7:\n\t"
00240                 "#movl $107, %0:\n\n\t"
00241                 "movl $0, %0:\n\n\t"
00242 
00243                 "Return:\n\t"
00244                 : "=a" (rval)
00245                 : /* no input */
00246                 : "eax", "ebx", "ecx", "edx"
00247         );
00248 
00249         /* Return */
00250         return(rval);
00251 }
00252 
00253 /*      Function to test if mmx instructions are supported...
00254 */
00255 inline extern int
00256 mmx_ok(void)
00257 {
00258         /* Returns 1 if MMX instructions are supported, 0 otherwise */
00259         return ( mm_support() & 0x1 );
00260 }
00261 
00262 
00263 /*      Helper functions for the instruction macros that follow...
00264         (note that memory-to-register, m2r, instructions are nearly
00265          as efficient as register-to-register, r2r, instructions;
00266          however, memory-to-memory instructions are really simulated
00267          as a convenience, and are only 1/3 as efficient)
00268 */
00269 #ifdef  MMX_TRACE
00270 
00271 /*      Include the stuff for printing a trace to stderr...
00272 */
00273 
00274 #include <stdio.h>
00275 
00276 #define mmx_i2r(op, imm, reg) \
00277         { \
00278                 mmx_t mmx_trace; \
00279                 mmx_trace = (imm); \
00280                 fprintf(stderr, #op "_i2r(" #imm "=0x%016llx, ", mmx_trace.q); \
00281                 __asm__ __volatile__ ("movq %%" #reg ", %0" \
00282                                       : "=X" (mmx_trace) \
00283                                       : /* nothing */ ); \
00284                 fprintf(stderr, #reg "=0x%016llx) => ", mmx_trace.q); \
00285                 __asm__ __volatile__ (#op " %0, %%" #reg \
00286                                       : /* nothing */ \
00287                                       : "X" (imm)); \
00288                 __asm__ __volatile__ ("movq %%" #reg ", %0" \
00289                                       : "=X" (mmx_trace) \
00290                                       : /* nothing */ ); \
00291                 fprintf(stderr, #reg "=0x%016llx\n", mmx_trace.q); \
00292         }
00293 
00294 #define mmx_m2r(op, mem, reg) \
00295         { \
00296                 mmx_t mmx_trace; \
00297                 mmx_trace = (mem); \
00298                 fprintf(stderr, #op "_m2r(" #mem "=0x%016llx, ", mmx_trace.q); \
00299                 __asm__ __volatile__ ("movq %%" #reg ", %0" \
00300                                       : "=X" (mmx_trace) \
00301                                       : /* nothing */ ); \
00302                 fprintf(stderr, #reg "=0x%016llx) => ", mmx_trace.q); \
00303                 __asm__ __volatile__ (#op " %0, %%" #reg \
00304                                       : /* nothing */ \
00305                                       : "X" (mem)); \
00306                 __asm__ __volatile__ ("movq %%" #reg ", %0" \
00307                                       : "=X" (mmx_trace) \
00308                                       : /* nothing */ ); \
00309                 fprintf(stderr, #reg "=0x%016llx\n", mmx_trace.q); \
00310         }
00311 
00312 #define mmx_r2m(op, reg, mem) \
00313         { \
00314                 mmx_t mmx_trace; \
00315                 __asm__ __volatile__ ("movq %%" #reg ", %0" \
00316                                       : "=X" (mmx_trace) \
00317                                       : /* nothing */ ); \
00318                 fprintf(stderr, #op "_r2m(" #reg "=0x%016llx, ", mmx_trace.q); \
00319                 mmx_trace = (mem); \
00320                 fprintf(stderr, #mem "=0x%016llx) => ", mmx_trace.q); \
00321                 __asm__ __volatile__ (#op " %%" #reg ", %0" \
00322                                       : "=X" (mem) \
00323                                       : /* nothing */ ); \
00324                 mmx_trace = (mem); \
00325                 fprintf(stderr, #mem "=0x%016llx\n", mmx_trace.q); \
00326         }
00327 
00328 #define mmx_r2r(op, regs, regd) \
00329         { \
00330                 mmx_t mmx_trace; \
00331                 __asm__ __volatile__ ("movq %%" #regs ", %0" \
00332                                       : "=X" (mmx_trace) \
00333                                       : /* nothing */ ); \
00334                 fprintf(stderr, #op "_r2r(" #regs "=0x%016llx, ", mmx_trace.q); \
00335                 __asm__ __volatile__ ("movq %%" #regd ", %0" \
00336                                       : "=X" (mmx_trace) \
00337                                       : /* nothing */ ); \
00338                 fprintf(stderr, #regd "=0x%016llx) => ", mmx_trace.q); \
00339                 __asm__ __volatile__ (#op " %" #regs ", %" #regd); \
00340                 __asm__ __volatile__ ("movq %%" #regd ", %0" \
00341                                       : "=X" (mmx_trace) \
00342                                       : /* nothing */ ); \
00343                 fprintf(stderr, #regd "=0x%016llx\n", mmx_trace.q); \
00344         }
00345 
00346 #define mmx_m2m(op, mems, memd) \
00347         { \
00348                 mmx_t mmx_trace; \
00349                 mmx_trace = (mems); \
00350                 fprintf(stderr, #op "_m2m(" #mems "=0x%016llx, ", mmx_trace.q); \
00351                 mmx_trace = (memd); \
00352                 fprintf(stderr, #memd "=0x%016llx) => ", mmx_trace.q); \
00353                 __asm__ __volatile__ ("movq %0, %%mm0\n\t" \
00354                                       #op " %1, %%mm0\n\t" \
00355                                       "movq %%mm0, %0" \
00356                                       : "=X" (memd) \
00357                                       : "X" (mems)); \
00358                 mmx_trace = (memd); \
00359                 fprintf(stderr, #memd "=0x%016llx\n", mmx_trace.q); \
00360         }
00361 
00362 #else
00363 
00364 /*      These macros are a lot simpler without the tracing...
00365 */
00366 
00367 #define mmx_i2r(op, imm, reg) \
00368         __asm__ __volatile__ (#op " $" #imm ", %%" #reg \
00369                               : /* nothing */ \
00370                               : /* nothing */);
00371 
00372 #define mmx_m2r(op, mem, reg) \
00373         __asm__ __volatile__ (#op " %0, %%" #reg \
00374                               : /* nothing */ \
00375                               : "X" (mem))
00376 
00377 #define mmx_r2m(op, reg, mem) \
00378         __asm__ __volatile__ (#op " %%" #reg ", %0" \
00379                               : "=X" (mem) \
00380                               : /* nothing */ )
00381 
00382 #define mmx_r2r(op, regs, regd) \
00383         __asm__ __volatile__ (#op " %" #regs ", %" #regd)
00384 
00385 #define mmx_m2m(op, mems, memd) \
00386         __asm__ __volatile__ ("movq %0, %%mm0\n\t" \
00387                               #op " %1, %%mm0\n\t" \
00388                               "movq %%mm0, %0" \
00389                               : "=X" (memd) \
00390                               : "X" (mems))
00391 
00392 #endif
00393 
00394 
00395 /*      1x64 MOVe Quadword
00396         (this is both a load and a store...
00397          in fact, it is the only way to store)
00398 */
00399 #define movq_m2r(var, reg)      mmx_m2r(movq, var, reg)
00400 #define movq_r2m(reg, var)      mmx_r2m(movq, reg, var)
00401 #define movq_r2r(regs, regd)    mmx_r2r(movq, regs, regd)
00402 #define movq(vars, vard) \
00403         __asm__ __volatile__ ("movq %1, %%mm0\n\t" \
00404                               "movq %%mm0, %0" \
00405                               : "=X" (vard) \
00406                               : "X" (vars))
00407 
00408 
00409 /*      1x32 MOVe Doubleword
00410         (like movq, this is both load and store...
00411          but is most useful for moving things between
00412          mmx registers and ordinary registers)
00413 */
00414 #define movd_m2r(var, reg)      mmx_m2r(movd, var, reg)
00415 #define movd_r2m(reg, var)      mmx_r2m(movd, reg, var)
00416 #define movd_r2r(regs, regd)    mmx_r2r(movd, regs, regd)
00417 #define movd(vars, vard) \
00418         __asm__ __volatile__ ("movd %1, %%mm0\n\t" \
00419                               "movd %%mm0, %0" \
00420                               : "=X" (vard) \
00421                               : "X" (vars))
00422 
00423 
00424 /*      2x32, 4x16, and 8x8 Parallel ADDs
00425 */
00426 #define paddd_m2r(var, reg)     mmx_m2r(paddd, var, reg)
00427 #define paddd_r2r(regs, regd)   mmx_r2r(paddd, regs, regd)
00428 #define paddd(vars, vard)       mmx_m2m(paddd, vars, vard)
00429 
00430 #define paddw_m2r(var, reg)     mmx_m2r(paddw, var, reg)
00431 #define paddw_r2r(regs, regd)   mmx_r2r(paddw, regs, regd)
00432 #define paddw(vars, vard)       mmx_m2m(paddw, vars, vard)
00433 
00434 #define paddb_m2r(var, reg)     mmx_m2r(paddb, var, reg)
00435 #define paddb_r2r(regs, regd)   mmx_r2r(paddb, regs, regd)
00436 #define paddb(vars, vard)       mmx_m2m(paddb, vars, vard)
00437 
00438 
00439 /*      4x16 and 8x8 Parallel ADDs using Saturation arithmetic
00440 */
00441 #define paddsw_m2r(var, reg)    mmx_m2r(paddsw, var, reg)
00442 #define paddsw_r2r(regs, regd)  mmx_r2r(paddsw, regs, regd)
00443 #define paddsw(vars, vard)      mmx_m2m(paddsw, vars, vard)
00444 
00445 #define paddsb_m2r(var, reg)    mmx_m2r(paddsb, var, reg)
00446 #define paddsb_r2r(regs, regd)  mmx_r2r(paddsb, regs, regd)
00447 #define paddsb(vars, vard)      mmx_m2m(paddsb, vars, vard)
00448 
00449 
00450 /*      4x16 and 8x8 Parallel ADDs using Unsigned Saturation arithmetic
00451 */
00452 #define paddusw_m2r(var, reg)   mmx_m2r(paddusw, var, reg)
00453 #define paddusw_r2r(regs, regd) mmx_r2r(paddusw, regs, regd)
00454 #define paddusw(vars, vard)     mmx_m2m(paddusw, vars, vard)
00455 
00456 #define paddusb_m2r(var, reg)   mmx_m2r(paddusb, var, reg)
00457 #define paddusb_r2r(regs, regd) mmx_r2r(paddusb, regs, regd)
00458 #define paddusb(vars, vard)     mmx_m2m(paddusb, vars, vard)
00459 
00460 
00461 /*      2x32, 4x16, and 8x8 Parallel SUBs
00462 */
00463 #define psubd_m2r(var, reg)     mmx_m2r(psubd, var, reg)
00464 #define psubd_r2r(regs, regd)   mmx_r2r(psubd, regs, regd)
00465 #define psubd(vars, vard)       mmx_m2m(psubd, vars, vard)
00466 
00467 #define psubw_m2r(var, reg)     mmx_m2r(psubw, var, reg)
00468 #define psubw_r2r(regs, regd)   mmx_r2r(psubw, regs, regd)
00469 #define psubw(vars, vard)       mmx_m2m(psubw, vars, vard)
00470 
00471 #define psubb_m2r(var, reg)     mmx_m2r(psubb, var, reg)
00472 #define psubb_r2r(regs, regd)   mmx_r2r(psubb, regs, regd)
00473 #define psubb(vars, vard)       mmx_m2m(psubb, vars, vard)
00474 
00475 
00476 /*      4x16 and 8x8 Parallel SUBs using Saturation arithmetic
00477 */
00478 #define psubsw_m2r(var, reg)    mmx_m2r(psubsw, var, reg)
00479 #define psubsw_r2r(regs, regd)  mmx_r2r(psubsw, regs, regd)
00480 #define psubsw(vars, vard)      mmx_m2m(psubsw, vars, vard)
00481 
00482 #define psubsb_m2r(var, reg)    mmx_m2r(psubsb, var, reg)
00483 #define psubsb_r2r(regs, regd)  mmx_r2r(psubsb, regs, regd)
00484 #define psubsb(vars, vard)      mmx_m2m(psubsb, vars, vard)
00485 
00486 
00487 /*      4x16 and 8x8 Parallel SUBs using Unsigned Saturation arithmetic
00488 */
00489 #define psubusw_m2r(var, reg)   mmx_m2r(psubusw, var, reg)
00490 #define psubusw_r2r(regs, regd) mmx_r2r(psubusw, regs, regd)
00491 #define psubusw(vars, vard)     mmx_m2m(psubusw, vars, vard)
00492 
00493 #define psubusb_m2r(var, reg)   mmx_m2r(psubusb, var, reg)
00494 #define psubusb_r2r(regs, regd) mmx_r2r(psubusb, regs, regd)
00495 #define psubusb(vars, vard)     mmx_m2m(psubusb, vars, vard)
00496 
00497 
00498 /*      4x16 Parallel MULs giving Low 4x16 portions of results
00499 */
00500 #define pmullw_m2r(var, reg)    mmx_m2r(pmullw, var, reg)
00501 #define pmullw_r2r(regs, regd)  mmx_r2r(pmullw, regs, regd)
00502 #define pmullw(vars, vard)      mmx_m2m(pmullw, vars, vard)
00503 
00504 
00505 /*      4x16 Parallel MULs giving High 4x16 portions of results
00506 */
00507 #define pmulhw_m2r(var, reg)    mmx_m2r(pmulhw, var, reg)
00508 #define pmulhw_r2r(regs, regd)  mmx_r2r(pmulhw, regs, regd)
00509 #define pmulhw(vars, vard)      mmx_m2m(pmulhw, vars, vard)
00510 
00511 
00512 /*      4x16->2x32 Parallel Mul-ADD
00513         (muls like pmullw, then adds adjacent 16-bit fields
00514          in the multiply result to make the final 2x32 result)
00515 */
00516 #define pmaddwd_m2r(var, reg)   mmx_m2r(pmaddwd, var, reg)
00517 #define pmaddwd_r2r(regs, regd) mmx_r2r(pmaddwd, regs, regd)
00518 #define pmaddwd(vars, vard)     mmx_m2m(pmaddwd, vars, vard)
00519 
00520 
00521 /*      1x64 bitwise AND
00522 */
00523 #ifdef  BROKEN_PAND
00524 #define pand_m2r(var, reg) \
00525         { \
00526                 mmx_m2r(pandn, (mmx_t) -1LL, reg); \
00527                 mmx_m2r(pandn, var, reg); \
00528         }
00529 #define pand_r2r(regs, regd) \
00530         { \
00531                 mmx_m2r(pandn, (mmx_t) -1LL, regd); \
00532                 mmx_r2r(pandn, regs, regd) \
00533         }
00534 #define pand(vars, vard) \
00535         { \
00536                 movq_m2r(vard, mm0); \
00537                 mmx_m2r(pandn, (mmx_t) -1LL, mm0); \
00538                 mmx_m2r(pandn, vars, mm0); \
00539                 movq_r2m(mm0, vard); \
00540         }
00541 #else
00542 #define pand_m2r(var, reg)      mmx_m2r(pand, var, reg)
00543 #define pand_r2r(regs, regd)    mmx_r2r(pand, regs, regd)
00544 #define pand(vars, vard)        mmx_m2m(pand, vars, vard)
00545 #endif
00546 
00547 
00548 /*      1x64 bitwise AND with Not the destination
00549 */
00550 #define pandn_m2r(var, reg)     mmx_m2r(pandn, var, reg)
00551 #define pandn_r2r(regs, regd)   mmx_r2r(pandn, regs, regd)
00552 #define pandn(vars, vard)       mmx_m2m(pandn, vars, vard)
00553 
00554 
00555 /*      1x64 bitwise OR
00556 */
00557 #define por_m2r(var, reg)       mmx_m2r(por, var, reg)
00558 #define por_r2r(regs, regd)     mmx_r2r(por, regs, regd)
00559 #define por(vars, vard) mmx_m2m(por, vars, vard)
00560 
00561 
00562 /*      1x64 bitwise eXclusive OR
00563 */
00564 #define pxor_m2r(var, reg)      mmx_m2r(pxor, var, reg)
00565 #define pxor_r2r(regs, regd)    mmx_r2r(pxor, regs, regd)
00566 #define pxor(vars, vard)        mmx_m2m(pxor, vars, vard)
00567 
00568 
00569 /*      2x32, 4x16, and 8x8 Parallel CoMPare for EQuality
00570         (resulting fields are either 0 or -1)
00571 */
00572 #define pcmpeqd_m2r(var, reg)   mmx_m2r(pcmpeqd, var, reg)
00573 #define pcmpeqd_r2r(regs, regd) mmx_r2r(pcmpeqd, regs, regd)
00574 #define pcmpeqd(vars, vard)     mmx_m2m(pcmpeqd, vars, vard)
00575 
00576 #define pcmpeqw_m2r(var, reg)   mmx_m2r(pcmpeqw, var, reg)
00577 #define pcmpeqw_r2r(regs, regd) mmx_r2r(pcmpeqw, regs, regd)
00578 #define pcmpeqw(vars, vard)     mmx_m2m(pcmpeqw, vars, vard)
00579 
00580 #define pcmpeqb_m2r(var, reg)   mmx_m2r(pcmpeqb, var, reg)
00581 #define pcmpeqb_r2r(regs, regd) mmx_r2r(pcmpeqb, regs, regd)
00582 #define pcmpeqb(vars, vard)     mmx_m2m(pcmpeqb, vars, vard)
00583 
00584 
00585 /*      2x32, 4x16, and 8x8 Parallel CoMPare for Greater Than
00586         (resulting fields are either 0 or -1)
00587 */
00588 #define pcmpgtd_m2r(var, reg)   mmx_m2r(pcmpgtd, var, reg)
00589 #define pcmpgtd_r2r(regs, regd) mmx_r2r(pcmpgtd, regs, regd)
00590 #define pcmpgtd(vars, vard)     mmx_m2m(pcmpgtd, vars, vard)
00591 
00592 #define pcmpgtw_m2r(var, reg)   mmx_m2r(pcmpgtw, var, reg)
00593 #define pcmpgtw_r2r(regs, regd) mmx_r2r(pcmpgtw, regs, regd)
00594 #define pcmpgtw(vars, vard)     mmx_m2m(pcmpgtw, vars, vard)
00595 
00596 #define pcmpgtb_m2r(var, reg)   mmx_m2r(pcmpgtb, var, reg)
00597 #define pcmpgtb_r2r(regs, regd) mmx_r2r(pcmpgtb, regs, regd)
00598 #define pcmpgtb(vars, vard)     mmx_m2m(pcmpgtb, vars, vard)
00599 
00600 
00601 /*      1x64, 2x32, and 4x16 Parallel Shift Left Logical
00602 */
00603 #define psllq_i2r(imm, reg)     mmx_i2r(psllq, imm, reg)
00604 #define psllq_m2r(var, reg)     mmx_m2r(psllq, var, reg)
00605 #define psllq_r2r(regs, regd)   mmx_r2r(psllq, regs, regd)
00606 #define psllq(vars, vard)       mmx_m2m(psllq, vars, vard)
00607 
00608 #define pslld_i2r(imm, reg)     mmx_i2r(pslld, imm, reg)
00609 #define pslld_m2r(var, reg)     mmx_m2r(pslld, var, reg)
00610 #define pslld_r2r(regs, regd)   mmx_r2r(pslld, regs, regd)
00611 #define pslld(vars, vard)       mmx_m2m(pslld, vars, vard)
00612 
00613 #define psllw_i2r(imm, reg)     mmx_i2r(psllw, imm, reg)
00614 #define psllw_m2r(var, reg)     mmx_m2r(psllw, var, reg)
00615 #define psllw_r2r(regs, regd)   mmx_r2r(psllw, regs, regd)
00616 #define psllw(vars, vard)       mmx_m2m(psllw, vars, vard)
00617 
00618 
00619 /*      1x64, 2x32, and 4x16 Parallel Shift Right Logical
00620 */
00621 #define psrlq_i2r(imm, reg)     mmx_i2r(psrlq, imm, reg)
00622 #define psrlq_m2r(var, reg)     mmx_m2r(psrlq, var, reg)
00623 #define psrlq_r2r(regs, regd)   mmx_r2r(psrlq, regs, regd)
00624 #define psrlq(vars, vard)       mmx_m2m(psrlq, vars, vard)
00625 
00626 #define psrld_i2r(imm, reg)     mmx_i2r(psrld, imm, reg)
00627 #define psrld_m2r(var, reg)     mmx_m2r(psrld, var, reg)
00628 #define psrld_r2r(regs, regd)   mmx_r2r(psrld, regs, regd)
00629 #define psrld(vars, vard)       mmx_m2m(psrld, vars, vard)
00630 
00631 #define psrlw_i2r(imm, reg)     mmx_i2r(psrlw, imm, reg)
00632 #define psrlw_m2r(var, reg)     mmx_m2r(psrlw, var, reg)
00633 #define psrlw_r2r(regs, regd)   mmx_r2r(psrlw, regs, regd)
00634 #define psrlw(vars, vard)       mmx_m2m(psrlw, vars, vard)
00635 
00636 
00637 /*      2x32 and 4x16 Parallel Shift Right Arithmetic
00638 */
00639 #define psrad_i2r(imm, reg)     mmx_i2r(psrad, imm, reg)
00640 #define psrad_m2r(var, reg)     mmx_m2r(psrad, var, reg)
00641 #define psrad_r2r(regs, regd)   mmx_r2r(psrad, regs, regd)
00642 #define psrad(vars, vard)       mmx_m2m(psrad, vars, vard)
00643 
00644 #define psraw_i2r(imm, reg)     mmx_i2r(psraw, imm, reg)
00645 #define psraw_m2r(var, reg)     mmx_m2r(psraw, var, reg)
00646 #define psraw_r2r(regs, regd)   mmx_r2r(psraw, regs, regd)
00647 #define psraw(vars, vard)       mmx_m2m(psraw, vars, vard)
00648 
00649 
00650 /*      2x32->4x16 and 4x16->8x8 PACK and Signed Saturate
00651         (packs source and dest fields into dest in that order)
00652 */
00653 #define packssdw_m2r(var, reg)  mmx_m2r(packssdw, var, reg)
00654 #define packssdw_r2r(regs, regd) mmx_r2r(packssdw, regs, regd)
00655 #define packssdw(vars, vard)    mmx_m2m(packssdw, vars, vard)
00656 
00657 #define packsswb_m2r(var, reg)  mmx_m2r(packsswb, var, reg)
00658 #define packsswb_r2r(regs, regd) mmx_r2r(packsswb, regs, regd)
00659 #define packsswb(vars, vard)    mmx_m2m(packsswb, vars, vard)
00660 
00661 
00662 /*      4x16->8x8 PACK and Unsigned Saturate
00663         (packs source and dest fields into dest in that order)
00664 */
00665 #define packuswb_m2r(var, reg)  mmx_m2r(packuswb, var, reg)
00666 #define packuswb_r2r(regs, regd) mmx_r2r(packuswb, regs, regd)
00667 #define packuswb(vars, vard)    mmx_m2m(packuswb, vars, vard)
00668 
00669 
00670 /*      2x32->1x64, 4x16->2x32, and 8x8->4x16 UNPaCK Low
00671         (interleaves low half of dest with low half of source
00672          as padding in each result field)
00673 */
00674 #define punpckldq_m2r(var, reg) mmx_m2r(punpckldq, var, reg)
00675 #define punpckldq_r2r(regs, regd) mmx_r2r(punpckldq, regs, regd)
00676 #define punpckldq(vars, vard)   mmx_m2m(punpckldq, vars, vard)
00677 
00678 #define punpcklwd_m2r(var, reg) mmx_m2r(punpcklwd, var, reg)
00679 #define punpcklwd_r2r(regs, regd) mmx_r2r(punpcklwd, regs, regd)
00680 #define punpcklwd(vars, vard)   mmx_m2m(punpcklwd, vars, vard)
00681 
00682 #define punpcklbw_m2r(var, reg) mmx_m2r(punpcklbw, var, reg)
00683 #define punpcklbw_r2r(regs, regd) mmx_r2r(punpcklbw, regs, regd)
00684 #define punpcklbw(vars, vard)   mmx_m2m(punpcklbw, vars, vard)
00685 
00686 
00687 /*      2x32->1x64, 4x16->2x32, and 8x8->4x16 UNPaCK High
00688         (interleaves high half of dest with high half of source
00689          as padding in each result field)
00690 */
00691 #define punpckhdq_m2r(var, reg) mmx_m2r(punpckhdq, var, reg)
00692 #define punpckhdq_r2r(regs, regd) mmx_r2r(punpckhdq, regs, regd)
00693 #define punpckhdq(vars, vard)   mmx_m2m(punpckhdq, vars, vard)
00694 
00695 #define punpckhwd_m2r(var, reg) mmx_m2r(punpckhwd, var, reg)
00696 #define punpckhwd_r2r(regs, regd) mmx_r2r(punpckhwd, regs, regd)
00697 #define punpckhwd(vars, vard)   mmx_m2m(punpckhwd, vars, vard)
00698 
00699 #define punpckhbw_m2r(var, reg) mmx_m2r(punpckhbw, var, reg)
00700 #define punpckhbw_r2r(regs, regd) mmx_r2r(punpckhbw, regs, regd)
00701 #define punpckhbw(vars, vard)   mmx_m2m(punpckhbw, vars, vard)
00702 
00703 
00704 /*      Empty MMx State
00705         (used to clean-up when going from mmx to float use
00706          of the registers that are shared by both; note that
00707          there is no float-to-mmx operation needed, because
00708          only the float tag word info is corruptible)
00709 */
00710 #ifdef  MMX_TRACE
00711 
00712 #define emms() \
00713         { \
00714                 fprintf(stderr, "emms()\n"); \
00715                 __asm__ __volatile__ ("emms"); \
00716         }
00717 
00718 #else
00719 
00720 #define emms()                  __asm__ __volatile__ ("emms")
00721 
00722 #endif
00723 
00724 #endif
00725 
00726