Cinelerra: hvirtual/mpeg2enc/mmx.h Source File

00001 /*
00002  * mmx.h
00003  * Copyright (C) 1997-1999 H. Dietz and R. Fisher
00004  *
00005  * This file is part of mpeg2dec, a free MPEG-2 video stream decoder.
00006  *
00007  * mpeg2dec is free software; you can redistribute it and/or modify
00008  * it under the terms of the GNU General Public License as published by
00009  * the Free Software Foundation; either version 2 of the License, or
00010  * (at your option) any later version.
00011  *
00012  * mpeg2dec is distributed in the hope that it will be useful,
00013  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00014  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015  * GNU General Public License for more details.
00016  *
00017  * You should have received a copy of the GNU General Public License
00018  * along with this program; if not, write to the Free Software
00019  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
00020  */
00021 
00022 #include "attributes.h"
00023 
00024 /*
00025  * The type of an value that fits in an MMX register (note that long
00026  * long constant values MUST be suffixed by LL and unsigned long long
00027  * values by ULL, lest they be truncated by the compiler)
00028  */
00029 
00030 typedef union {
00031         int64_t                 q;      /* Quadword (64-bit) value */
00032         uint64_t                uq;     /* Unsigned Quadword */
00033         int32_t                 d[2];   /* 2 Doubleword (32-bit) values */
00034         uint32_t                ud[2];  /* 2 Unsigned Doubleword */
00035         int16_t                 w[4];   /* 4 Word (16-bit) values */
00036         uint16_t                uw[4];  /* 4 Unsigned Word */
00037         int8_t                  b[8];   /* 8 Byte (8-bit) values */
00038         uint8_t                 ub[8];  /* 8 Unsigned Byte */
00039         float                   s[2];   /* Single-precision (32-bit) value */
00040 } ATTR_ALIGN(8) mmx_t;  /* On an 8-byte (64-bit) boundary */
00041 
00042 
00043 #define mmx_si2r(op,imm,reg) \
00044         __asm__ __volatile__ (#op " %0, %%" #reg \
00045                               : /* nothing */ \
00046                               : "J" (imm) )
00047 
00048 #define mmx_m2r(op,mem,reg) \
00049         __asm__ __volatile__ (#op " %0, %%" #reg \
00050                               : /* nothing */ \
00051                               : "m" (mem))
00052 
00053 #define mmx_r2m(op,reg,mem) \
00054         __asm__ __volatile__ (#op " %%" #reg ", %0" \
00055                               : "=m" (mem) \
00056                               : /* nothing */ )
00057 
00058 #define mmx_g2r(op,mem,reg) \
00059         __asm__ __volatile__ (#op " %0, %%" #reg \
00060                               : /* nothing */ \
00061                               : "rm" (mem))
00062 
00063 #define mmx_r2g(op,reg,mem) \
00064         __asm__ __volatile__ (#op " %%" #reg ", %0" \
00065                               : "=rm" (mem) \
00066                               : /* nothing */ )
00067 
00068 #define mmx_r2r(op,regs,regd) \
00069         __asm__ __volatile__ (#op " %" #regs ", %" #regd)
00070 
00071 
00072 #define emms() __asm__ __volatile__ ("emms")
00073 #define femms() __asm__ __volatile__ ("femms")
00074 
00075 #define movd_m2r(var,reg)       mmx_m2r (movd, var, reg)
00076 #define movd_r2m(reg,var)       mmx_r2m (movd, reg, var)
00077 #define movd_g2r(var,reg)       mmx_g2r (movd, var, reg)
00078 #define movd_r2g(reg,var)       mmx_r2g (movd, reg, var)
00079 #define movd_r2r(regs,regd)     mmx_r2r (movd, regs, regd)
00080 
00081 #define movq_m2r(var,reg)       mmx_m2r (movq, var, reg)
00082 #define movq_r2m(reg,var)       mmx_r2m (movq, reg, var)
00083 #define movq_r2r(regs,regd)     mmx_r2r (movq, regs, regd)
00084 
00085 #define packssdw_m2r(var,reg)   mmx_m2r (packssdw, var, reg)
00086 #define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd)
00087 #define packsswb_m2r(var,reg)   mmx_m2r (packsswb, var, reg)
00088 #define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd)
00089 
00090 #define packuswb_m2r(var,reg)   mmx_m2r (packuswb, var, reg)
00091 #define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd)
00092 
00093 #define paddb_m2r(var,reg)      mmx_m2r (paddb, var, reg)
00094 #define paddb_r2r(regs,regd)    mmx_r2r (paddb, regs, regd)
00095 #define paddd_m2r(var,reg)      mmx_m2r (paddd, var, reg)
00096 #define paddd_r2r(regs,regd)    mmx_r2r (paddd, regs, regd)
00097 #define paddw_m2r(var,reg)      mmx_m2r (paddw, var, reg)
00098 #define paddw_r2r(regs,regd)    mmx_r2r (paddw, regs, regd)
00099 
00100 #define paddsb_m2r(var,reg)     mmx_m2r (paddsb, var, reg)
00101 #define paddsb_r2r(regs,regd)   mmx_r2r (paddsb, regs, regd)
00102 #define paddsw_m2r(var,reg)     mmx_m2r (paddsw, var, reg)
00103 #define paddsw_r2r(regs,regd)   mmx_r2r (paddsw, regs, regd)
00104 
00105 #define paddusb_m2r(var,reg)    mmx_m2r (paddusb, var, reg)
00106 #define paddusb_r2r(regs,regd)  mmx_r2r (paddusb, regs, regd)
00107 #define paddusw_m2r(var,reg)    mmx_m2r (paddusw, var, reg)
00108 #define paddusw_r2r(regs,regd)  mmx_r2r (paddusw, regs, regd)
00109 
00110 #define pand_m2r(var,reg)       mmx_m2r (pand, var, reg)
00111 #define pand_r2r(regs,regd)     mmx_r2r (pand, regs, regd)
00112 
00113 #define pandn_m2r(var,reg)      mmx_m2r (pandn, var, reg)
00114 #define pandn_r2r(regs,regd)    mmx_r2r (pandn, regs, regd)
00115 
00116 #define pcmpeqb_m2r(var,reg)    mmx_m2r (pcmpeqb, var, reg)
00117 #define pcmpeqb_r2r(regs,regd)  mmx_r2r (pcmpeqb, regs, regd)
00118 #define pcmpeqd_m2r(var,reg)    mmx_m2r (pcmpeqd, var, reg)
00119 #define pcmpeqd_r2r(regs,regd)  mmx_r2r (pcmpeqd, regs, regd)
00120 #define pcmpeqw_m2r(var,reg)    mmx_m2r (pcmpeqw, var, reg)
00121 #define pcmpeqw_r2r(regs,regd)  mmx_r2r (pcmpeqw, regs, regd)
00122 
00123 #define pcmpgtb_m2r(var,reg)    mmx_m2r (pcmpgtb, var, reg)
00124 #define pcmpgtb_r2r(regs,regd)  mmx_r2r (pcmpgtb, regs, regd)
00125 #define pcmpgtd_m2r(var,reg)    mmx_m2r (pcmpgtd, var, reg)
00126 #define pcmpgtd_r2r(regs,regd)  mmx_r2r (pcmpgtd, regs, regd)
00127 #define pcmpgtw_m2r(var,reg)    mmx_m2r (pcmpgtw, var, reg)
00128 #define pcmpgtw_r2r(regs,regd)  mmx_r2r (pcmpgtw, regs, regd)
00129 
00130 #define pmaddwd_m2r(var,reg)    mmx_m2r (pmaddwd, var, reg)
00131 #define pmaddwd_r2r(regs,regd)  mmx_r2r (pmaddwd, regs, regd)
00132 
00133 #define pmulhw_m2r(var,reg)     mmx_m2r (pmulhw, var, reg)
00134 #define pmulhw_r2r(regs,regd)   mmx_r2r (pmulhw, regs, regd)
00135 
00136 #define pmullw_m2r(var,reg)     mmx_m2r (pmullw, var, reg)
00137 #define pmullw_r2r(regs,regd)   mmx_r2r (pmullw, regs, regd)
00138 
00139 #define por_m2r(var,reg)        mmx_m2r (por, var, reg)
00140 #define por_r2r(regs,regd)      mmx_r2r (por, regs, regd)
00141 
00142 #define pslld_i2r(imm,reg)      mmx_si2r (pslld, imm, reg)
00143 #define pslld_m2r(var,reg)      mmx_m2r (pslld, var, reg)
00144 #define pslld_r2r(regs,regd)    mmx_r2r (pslld, regs, regd)
00145 #define psllq_i2r(imm,reg)      mmx_si2r (psllq, imm, reg)
00146 #define psllq_m2r(var,reg)      mmx_m2r (psllq, var, reg)
00147 #define psllq_r2r(regs,regd)    mmx_r2r (psllq, regs, regd)
00148 #define psllw_i2r(imm,reg)      mmx_si2r (psllw, imm, reg)
00149 #define psllw_m2r(var,reg)      mmx_m2r (psllw, var, reg)
00150 #define psllw_r2r(regs,regd)    mmx_r2r (psllw, regs, regd)
00151 
00152 #define psrad_i2r(imm,reg)      mmx_si2r (psrad, imm, reg)
00153 #define psrad_m2r(var,reg)      mmx_m2r (psrad, var, reg)
00154 #define psrad_r2r(regs,regd)    mmx_r2r (psrad, regs, regd)
00155 #define psraw_i2r(imm,reg)      mmx_si2r (psraw, imm, reg)
00156 #define psraw_m2r(var,reg)      mmx_m2r (psraw, var, reg)
00157 #define psraw_r2r(regs,regd)    mmx_r2r (psraw, regs, regd)
00158 
00159 #define psrld_i2r(imm,reg)      mmx_si2r (psrld, imm, reg)
00160 #define psrld_m2r(var,reg)      mmx_m2r (psrld, var, reg)
00161 #define psrld_r2r(regs,regd)    mmx_r2r (psrld, regs, regd)
00162 #define psrlq_i2r(imm,reg)      mmx_si2r (psrlq, imm, reg)
00163 #define psrlq_m2r(var,reg)      mmx_m2r (psrlq, var, reg)
00164 #define psrlq_r2r(regs,regd)    mmx_r2r (psrlq, regs, regd)
00165 #define psrlw_i2r(imm,reg)      mmx_si2r (psrlw, imm, reg)
00166 #define psrlw_m2r(var,reg)      mmx_m2r (psrlw, var, reg)
00167 #define psrlw_r2r(regs,regd)    mmx_r2r (psrlw, regs, regd)
00168 
00169 #define psubb_m2r(var,reg)      mmx_m2r (psubb, var, reg)
00170 #define psubb_r2r(regs,regd)    mmx_r2r (psubb, regs, regd)
00171 #define psubd_m2r(var,reg)      mmx_m2r (psubd, var, reg)
00172 #define psubd_r2r(regs,regd)    mmx_r2r (psubd, regs, regd)
00173 #define psubw_m2r(var,reg)      mmx_m2r (psubw, var, reg)
00174 #define psubw_r2r(regs,regd)    mmx_r2r (psubw, regs, regd)
00175 
00176 #define psubsb_m2r(var,reg)     mmx_m2r (psubsb, var, reg)
00177 #define psubsb_r2r(regs,regd)   mmx_r2r (psubsb, regs, regd)
00178 #define psubsw_m2r(var,reg)     mmx_m2r (psubsw, var, reg)
00179 #define psubsw_r2r(regs,regd)   mmx_r2r (psubsw, regs, regd)
00180 
00181 #define psubusb_m2r(var,reg)    mmx_m2r (psubusb, var, reg)
00182 #define psubusb_r2r(regs,regd)  mmx_r2r (psubusb, regs, regd)
00183 #define psubusw_m2r(var,reg)    mmx_m2r (psubusw, var, reg)
00184 #define psubusw_r2r(regs,regd)  mmx_r2r (psubusw, regs, regd)
00185 
00186 #define punpckhbw_m2r(var,reg)          mmx_m2r (punpckhbw, var, reg)
00187 #define punpckhbw_r2r(regs,regd)        mmx_r2r (punpckhbw, regs, regd)
00188 #define punpckhdq_m2r(var,reg)          mmx_m2r (punpckhdq, var, reg)
00189 #define punpckhdq_r2r(regs,regd)        mmx_r2r (punpckhdq, regs, regd)
00190 #define punpckhwd_m2r(var,reg)          mmx_m2r (punpckhwd, var, reg)
00191 #define punpckhwd_r2r(regs,regd)        mmx_r2r (punpckhwd, regs, regd)
00192 
00193 #define punpcklbw_m2r(var,reg)          mmx_m2r (punpcklbw, var, reg)
00194 #define punpcklbw_r2r(regs,regd)        mmx_r2r (punpcklbw, regs, regd)
00195 #define punpckldq_m2r(var,reg)          mmx_m2r (punpckldq, var, reg)
00196 #define punpckldq_r2r(regs,regd)        mmx_r2r (punpckldq, regs, regd)
00197 #define punpcklwd_m2r(var,reg)          mmx_m2r (punpcklwd, var, reg)
00198 #define punpcklwd_r2r(regs,regd)        mmx_r2r (punpcklwd, regs, regd)
00199 
00200 #define pxor_m2r(var, reg)      mmx_m2r (pxor, var, reg)
00201 #define pxor_r2r(regs, regd)    mmx_r2r (pxor, regs, regd)
00202 
00203 /* AMD MMX extensions - also available in intel SSE */
00204 
00205 
00206 #define mmx_m2ri(op,mem,reg,imm) \
00207         __asm__ __volatile__ (#op " %1, %0, %%" #reg \
00208                               : /* nothing */ \
00209                               : "m" (mem), "i" (imm))
00210 #define mmx_r2ri(op,regs,regd,imm) \
00211         __asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \
00212                               : /* nothing */ \
00213                               : "i" (imm) )
00214 
00215 #define mmx_fetch(mem,hint) \
00216         __asm__ __volatile__ ("prefetch" #hint " %0" \
00217                               : /* nothing */ \
00218                               : "m" (mem))
00219 
00220 /* 3DNow goodies */
00221 #define pfmul_m2r(var,reg) mmx_m2r( pfmul, var, reg )
00222 #define pfmul_r2r(regs,regd) mmx_r2r( pfmul, regs, regd )
00223 #define pfadd_m2r(var,reg) mmx_m2r( pfadd, var, reg )
00224 #define pfadd_r2r(regs,regd) mmx_r2r( pfadd, regs, regd )
00225 #define pf2id_r2r(regs,regd) mmx_r2r( pf2id, regs, regd )
00226 #define pi2fd_r2r(regs,regd) mmx_r2r( pi2fd, regs, regd )
00227 
00228 /* SSE goodies */
00229 #define addps_m2r( var, regd) mmx_m2r( addps, var, regd )
00230 #define addps_r2r( regs, regd) mmx_r2r( addps, regs, regd )
00231 #define subps_r2r( regs, regd) mmx_r2r( subps, regs, regd )
00232 
00233 #define minps_r2r( regs, regd) mmx_r2r( minps, regs, regd )
00234 #define maxps_r2r( regs, regd) mmx_r2r( maxps, regs, regd )
00235 
00236 #define mulps_r2r( regs, regd) mmx_r2r( mulps, regs, regd )
00237 #define mulps_m2r( var, regd) mmx_m2r( mulps, var, regd )
00238 #define movups_r2r(reg1, reg2) mmx_r2r( movups, reg1, reg2 )
00239 #define movups_m2r(var, reg) mmx_m2r( movups, var, reg )
00240 #define movaps_m2r(var, reg) mmx_m2r( movaps, var, reg )
00241 #define movaps_r2r(reg1, reg2) mmx_r2r( movaps, reg1, reg2 )
00242 #define movlps_m2r(var, reg) mmx_m2r( movlps, var, reg )
00243 #define movlps_r2m(reg, var) mmx_r2m( movlps, reg, var )
00244 #define movlhps_m2r(var, reg) mmx_m2r( movlhps, var, reg )
00245 #define movlhps_r2r(reg1, reg2) mmx_r2r( movlhps, reg1, reg2 )
00246 #define movhlps_r2r(reg1, reg2) mmx_r2r( movhlps, reg1, reg2 )
00247 #define movups_r2m(reg, var) mmx_r2m( movups, reg, var )
00248 #define movaps_r2m(reg, var) mmx_r2m( movaps, reg, var )
00249 
00250 #define movss_r2m(reg, var) mmx_r2m( movss, reg, var )
00251 
00252 #define cvttps2pi_r2r(regs,regd) mmx_r2r( cvttps2pi, regs, regd )
00253 #define cvtps2pi_r2r(regs,regd) mmx_r2r( cvtps2pi, regs, regd )
00254 #define cvtpi2ps_r2r(regs,regd) mmx_r2r( cvtpi2ps, regs, regd )
00255 #define shufps_r2ri(regs, regd, imm) mmx_r2ri( shufps, regs, regd, imm )
00256 #define unpcklps_r2r(reg1, reg2) mmx_r2r( unpcklps, reg1, reg2 )
00257 #define unpckhps_r2r(reg1, reg2) mmx_r2r( unpckhps, reg1, reg2 )
00258 
00259 
00260 #define maskmovq(regs,maskreg)          mmx_r2ri (maskmovq, regs, maskreg)
00261 
00262 #define movntq_r2m(mmreg,var)           mmx_r2m (movntq, mmreg, var)
00263 
00264 #define pavgb_m2r(var,reg)              mmx_m2r (pavgb, var, reg)
00265 #define pavgb_r2r(regs,regd)            mmx_r2r (pavgb, regs, regd)
00266 #define pavgw_m2r(var,reg)              mmx_m2r (pavgw, var, reg)
00267 #define pavgw_r2r(regs,regd)            mmx_r2r (pavgw, regs, regd)
00268 
00269 #define pextrw_r2r(mmreg,reg,imm)       mmx_r2ri (pextrw, mmreg, reg, imm)
00270 
00271 #define pinsrw_r2r(reg,mmreg,imm)       mmx_r2ri (pinsrw, reg, mmreg, imm)
00272 
00273 #define pmaxsw_m2r(var,reg)             mmx_m2r (pmaxsw, var, reg)
00274 #define pmaxsw_r2r(regs,regd)           mmx_r2r (pmaxsw, regs, regd)
00275 
00276 #define pmaxub_m2r(var,reg)             mmx_m2r (pmaxub, var, reg)
00277 #define pmaxub_r2r(regs,regd)           mmx_r2r (pmaxub, regs, regd)
00278 
00279 #define pminsw_m2r(var,reg)             mmx_m2r (pminsw, var, reg)
00280 #define pminsw_r2r(regs,regd)           mmx_r2r (pminsw, regs, regd)
00281 
00282 #define pminub_m2r(var,reg)             mmx_m2r (pminub, var, reg)
00283 #define pminub_r2r(regs,regd)           mmx_r2r (pminub, regs, regd)
00284 
00285 #define pmovmskb(mmreg,reg) \
00286         __asm__ __volatile__ ("movmskps %" #mmreg ", %" #reg)
00287 
00288 #define pmulhuw_m2r(var,reg)            mmx_m2r (pmulhuw, var, reg)
00289 #define pmulhuw_r2r(regs,regd)          mmx_r2r (pmulhuw, regs, regd)
00290 
00291 #define prefetcht0(mem)                 mmx_fetch (mem, t0)
00292 #define prefetcht1(mem)                 mmx_fetch (mem, t1)
00293 #define prefetcht2(mem)                 mmx_fetch (mem, t2)
00294 #define prefetchnta(mem)                mmx_fetch (mem, nta)
00295 
00296 #define psadbw_m2r(var,reg)             mmx_m2r (psadbw, var, reg)
00297 #define psadbw_r2r(regs,regd)           mmx_r2r (psadbw, regs, regd)
00298 
00299 #define pshufw_m2ri(var,reg,imm)        mmx_m2ri( pshufw, var, reg, imm)
00300 #define pshufw_r2ri(regs,regd,imm)      mmx_r2ri( pshufw, regs, regd, imm)
00301 
00302 #define sfence() __asm__ __volatile__ ("sfence\n\t")